The present invention relates to CMOS transistors, and more specifically, to n and p channel metal oxide semiconductor (MOS) field effect transistors (FET's) having differentially stressed spacers and differentially stressed channels.
Stressor layers have been one of the techniques used to increase device performance. However, due to the location of the spacers for short channel effect control, the stressor layers are typically located a few hundred angstroms away from the channel over a spacer thereby limiting the extent of performance improvement in carrier mobility in the channel.